Kyung Park - Senior Semiconductor Technical Leader

Q: Where is Kyung based?

Kyung is based in Munich, Germany and can operate in on-site , hybrid , and remote work models.

Q: What languages does Kyung speak?

Kyung speaks the following languages: Korean (Native), English (Advanced), German (Intermediate) .

Q: How many years of experience does Kyung have?

Kyung has at least 28 years of experience. During this time, Kyung has worked in at least 8 different roles and for 8 different companies . The average length of individual experience is 4 years and 6 months . Note that Kyung may not have shared all experience and actually has more experience.

Q: What is Kyung's latest experience?

Kyung's most recent position is Expert, Design-to-Mask Preparation at Robert Bosch Semiconductor Manufacturing Dresden .

Q: What companies has Kyung worked for in recent years?

In recent years, Kyung has worked for Robert Bosch Semiconductor Manufacturing Dresden , Siemens EDA (Electronic Design Automation and Mentor Graphics) .

Q: Which industries is Kyung most experienced in?

Kyung is most experienced in industries like Manufacturing , Information Technology (IT) , and Automotive .

Q: Which business areas is Kyung most experienced in?

Kyung is most experienced in business areas like Product Development , Quality Assurance (QA) , and Project Management . Kyung also has some experience in Research and Development (R&D) , Sales , and Operations .

Q: Which industries has Kyung worked in recently?

Kyung has recently worked in industries like Manufacturing , Information Technology (IT) , and Automotive .

Q: Which business areas has Kyung worked in recently?

Kyung has recently worked in business areas like Product Development , Quality Assurance (QA) , and Project Management .

Recommended expert

Munich, Germany

Experience

Apr 2025 - Oct 2025

7 months

Dresden, Germany

Expert, Design-to-Mask Preparation

Robert Bosch Semiconductor Manufacturing Dresden

Led end-to-end tape-out and photomask preparation for a 300mm automotive semiconductor program, ensuring manufacturability, data integrity, and compliance with automotive quality standards, frame generation, multi-die placement
Identified and mitigated manufacturing-readiness risks during technology transfer (TI / TSMC 45nm) by implementing reticle, kerf, and alignment optimizations, reducing re-spin exposure, creating alignment, overlay markers, metrology targets, CD-control features, PDM cell
Coordinated cross-functional stakeholders across design, lithography, manufacturing, and mask vendors to deliver a production-ready mask set under strict schedule constraints
Performed and calibrated model-based OPC for the 110 nm node, leveraging RET strategies in collaboration with the photolithography modeling team
Impact: Enabled on-time production release of a safety-critical automotive semiconductor by mitigating tape-out and manufacturability risks under strict quality and yield

Jun 2014 - Mar 2025

10 years 10 months

Munich, Germany

Senior Customer Application Engineer (Calibre Portfolio)

Siemens EDA (Electronic Design Automation, Mentor Graphics)

Served as a trusted technical advisor to Tier-1 semiconductor companies (Intel, Infineon, GlobalFoundries, ST, Apple), supporting strategic decisions across verification, manufacturability, and sign-off
Led customer engagements end-to-end from problem framing and solution benchmarking to implementation, automation, and tape-out readiness in IC Physical design solutions, directly influencing project outcomes and schedules
Designed and deployed custom verification & automation flows (DRC/DFM/PERC/LVS), PDK, eliminating recurring bottlenecks and reducing late-stage design and manufacturing risk
Focused on IC manufacturing backend and customer application engineering for Calibre OPC / RET (Resolution Enhancement Technology) in foundry environments
Strong expertise in RET-driven lithography enablement, integrating SRAF engineering, Mask Data Preparation (MDP), multi-patterning strategies, ILT-based simulation, MPC, and verification flows to optimize layout manufacturability
Delivered leadership-level briefings and technical workshops, and enablement sessions, aligning engineering teams and decision-makers on adoption of advanced verification and manufacturability solutions
Impact: Drove adoption contributing to multi-year enterprise agreements of Calibre verification and DFM solutions across multiple Tier-1 customers, strengthening long-term strategic partnerships and accelerating customer time-to-market.

Feb 2013 - Nov 2013

10 months

Amtzell, Germany

Consultant Sales Engineer (Asia Market)

DSP-Weuffen GmbH

Led technical sales engagements for ADAS, multi-camera, MCU, and DSP platforms across China and Korea, supporting customer evaluations and design-in decisions
Developed and managed Tier-1 automotive accounts including Delphi, Mando, Hyundai Mobis, and Desay, acting as the primary technical and commercial interface
Delivered system-level HW/SW demonstrations (surround-view and vision systems) and supported customer benchmarking and feasibility assessments
Impact: Accelerated evaluations shortening sales cycles and design-in discussions for automotive electronics platforms across APAC by translating system-level capabilities into customer-specific value.

Dec 2012 - Sep 2013

10 months

Munich, Germany

Consultant – IC Package / PDK Engineer

Infineon Technologies AG

Developed Calibre-based DRC rule decks for wire-bond BGA, TSSOP, and MQFP LF packages, supporting standardized package verification flows
Created test cases and validation frameworks to ensure rule-deck accuracy, production readiness, and proper documentation
Coordinated OSAT alignment with Amkor Technology and ASE, ensuring consistency between design rules, package implementation, and manufacturing constraints
Impact: Enabled production-ready package verification flows and smoother OSAT integration, reducing risk during package qualification and manufacturing ramp-up.

Jan 2010 - Sep 2012

2 years 9 months

Dortmund, Germany

Senior Sales Representative (APAC)

ELMOS Semiconductor SE

Managed sales operations and distributor networks across Singapore, Korea, China, Japan, and Taiwan, serving as the primary interface for OEM / Tier-1 automotive customers
Generated €15M in revenue for ultrasonic parking sensor ICs by driving customer engagement, design-in activities, and long-term account development
Led contract and pricing negotiations with major customers including Hyundai Mobis, Panasonic, Delphi, and Alpine, balancing technical requirements with commercial objectives
Delivered end-to-end technical and commercial design-in support for automotive ASIC projects spanning sensing, power management, motor control, and in-vehicle networking (CAN, LIN-SBC, FlexRay)
Impact: Secured multiple long-term automotive design wins and €15M in revenue by aligning customer technical requirements with commercial strategy across APAC Tier-1 accounts.

Sep 2004 - Jul 2009

4 years 11 months

Munich, Germany

Senior IC Physical Designer – DRAM (DDR2/DDR3) & Mixed-Signal

Qimonda AG / Infineon Technologies AG

Led full-custom physical design and sign-off for DDR2/DDR3 DRAM and mixed-signal products, covering DRC/LVS compliance and tape-out readiness
Executed analog, mixed-signal, and power layout across 90nm → 45nm CMOS nodes, ensuring manufacturability, yield optimization, and device-matching precision
Performed digital P&R (ICC2), parasitic extraction, and IR-drop / EM / antenna checks, supporting robust timing and reliability sign-off
Improved design-cycle efficiency by integrating digital blocks through PCell-based methodologies and Virtuoso XL, reducing manual layout effort
Authored technical guidelines and contributed to global analog layout methodologies, enabling consistency and reuse across design teams
Impact: Delivered tape-out-ready DDR memory and mixed-signal silicon on schedule while improving layout robustness, yield, and design-cycle efficiency across multiple technology nodes.

Jan 2004 - Jul 2004

7 months

Hsinchu, Taiwan, Province of China

Senior IC Design Engineer

Integrated Silicon Solution Inc.

Executed mask revisions and layout optimization for a 256Mb LP-SDRAM product, covering RTL-to-GDS implementation and verification
Supported manufacturability improvements and sign-off quality, ensuring alignment with TSMC PRRM requirements
Impact: Enabled tape-out-ready LP-SDRAM design with improved verification robustness and manufacturability, reducing risk during foundry sign-off.

Feb 1996 - Dec 2003

7 years 11 months

Icheon-si, Korea, Republic of

Senior IC Design Engineer – DRAM Circuit & Physical Design

SK-Hynix Semiconductor

Led DRAM and SRAM circuit design and chip architecture definition, covering high-speed clocks, sense amplifiers, power management, I/O, refresh, and control logic, with full-chip simulation and JEDEC-compliant timing sign-off
Executed HSPICE/HSIM simulations, first-silicon debug, failure analysis, and timing closure, supporting reliable transition from design to volume production
Coordinated physical design teams through floor-planning, tape-out, and full-chip sign-off, ensuring alignment across circuit, layout, and manufacturing interfaces
Designed and verified critical layout blocks (I/O, ESD/latch-up protection, core arrays, power routing), performing RC extraction, IR-drop, DRC/LVS/ERC/OPC sign-off, and implementing dummy-fill and CMP-aware optimizations to improve wafer yield
Led development of design automation and P&R flows, writing Hercules and Assura rule decks and supporting post-layout SI and static timing analysis sign-off using StarRC
Impact: Supported multiple high-volume DRAM product launches by integrating circuit design, physical implementation, and automation flows, improving yield, sign-off robustness, and scalability in production.

Industries Experience

See where this freelancer has spent most of their professional time. Longer bars indicate deeper hands-on experience, while shorter ones reflect targeted or project-based work.

Experienced in Manufacturing (28 years), Information Technology (11 years), and Automotive (4 years).

Manufacturing

Information Technology

Automotive

Business Areas Experience

The graph below provides a cumulative view of the freelancer's experience across multiple business areas, calculated from completed and active engagements. It highlights the areas where the freelancer has most frequently contributed to planning, execution, and delivery of business outcomes.

Experienced in Product Development (25.5 years), Quality Assurance (17.5 years), Project Management (11 years), Research and Development (8 years), Sales (3.5 years), and Operations (0.5 years).

Product Development

Quality Assurance

Project Management

Research and Development

Sales

Operations

Summary

Highly experienced semiconductor technologist with nearly three decades of experience and senior technical leadership spanning IC design, EDA sign-off, and manufacturing.

Operates at the intersection of technology strategy, global foundry ecosystems, and commercial execution, enabling automotive and high-reliability silicon from concept through high-volume manufacturing.

Demonstrated ability to translate complex technical risk into clear, actionable decision frameworks, accelerate time-to-tape-out, and drive sustained, multi-region revenue growth.

Skills

Core Leadership Themes

End-to-end Accountability From Design Intent To Manufacturing Sign-off
Risk Governance For Automotive, Safety-critical, And Long-lifecycle Silicon
Senior-level Interface Across Customers, Foundries, And Internal Organizations
Scalable Enablement Across Emea And Apac

Technical & Strategic Impact

De-risked Complex Tape-outs Across Advanced And Legacy Nodes By Aligning Design, Verification, Mask, And Foundry Constraints Early In The Lifecycle
Enabled Manufacturing-ready Sign-off For Automotive And Safety-critical Products Under Stringent Reliability, Yield, And Longevity Requirements
Served As A Trusted Technical Authority Supporting Customer Adoption, Investment, Roadmap, And Sourcing Decisions Through Hands-on Enablement And Escalation Support
Drove Sustained Revenue Growth By Combining Sign-off–level Technical Credibility With Enterprise-level Customer Engagement

Ic Design & Eda Governance

Provide Strategic Oversight For Ic Design And Eda Verification Programs Across Memory, Analog, And Mixed-signal Domains
Own Governance Of Full-chip Sign-off Including Drc, Lvs, Dfm, And Opc Lithography Through Gdsii Tape-out, Ensuring Alignment Between Design Intent, Manufacturing Feasibility, And Business Timelines
Act As Escalation Point For High-risk Design And Manufacturability Issues Impacting Schedule, Yield, Or Customer Commitments

Manufacturing & Design-to-mask Ownership

Own And Execute End-to-end Tape-out Execution And Photomask Preparation For Automotive And High-reliability Semiconductor Programs
Ensure Data Integrity, Manufacturability Validation, And Predictable Handoff Between Design Teams, Mask Shops, And Foundries
Drive Continuous Improvement In Yield Learning, Defect Reduction, And Sign-off Efficiency Across Multi-project Portfolios

Foundry & Ecosystem Leadership

Act As The Primary Technical Interface To Global Foundries, Enabling Technology Transfer, Yield Ramp, And Process Optimization Across Planar And Finfet Nodes
Influence Foundry-facing Decisions Through Deep Understanding Of Silicon Physics, Customer Product Requirements, And Manufacturing Constraints, Balancing Performance, Cost, Risk, And Long-term Supply Assurance
Foundry Experience: Tsmc, Samsung Foundry, Intel Foundry, Globalfoundries, Stmicroelectronics

Commercial & Enterprise Leadership

Combine Sign-off-level Technical Credibility With Commercial Leadership To Support Enterprise Sales, Strategic Accounts, And Long-term Customer Partnerships
Enable Multi-million-euro Engagements By Aligning Executive Stakeholders, Engineering Teams, And Foundry Partners Around Clear Technical And Business Outcomes
Act As Trusted Advisor To Tier-1 Customers And Senior Leadership Across Emea And Apac

Domains & Industries Of Expertise

Automotive Semiconductors
Engineering And Sales Of High-reliability & Safety-critical Ics
Electronic Design Automation (Eda) Software

Technical Foundations

Design & Verification: Ic Design, Eda Sign-off, Design-to-mask
Manufacturing: Foundry Enablement, Yield Optimization, Tape-out Governance
Automation & Scripting: Python, Tcl, Skill, Shell

Languages

Korean

Native

English

Advanced

German

Intermediate

Education

Mar 1989 - Feb 1996

University of Ulsan

Bachelor of Science, Electronics Engineering · Electronics Engineering · Ulsan, Korea, Republic of

Certifications & licenses

EU Long-Term Residence Permit (Long-Term EU Residence Permit)

Profile

Created

February 2026

Need a freelancer? Find your match in seconds.

Try FRATCH GPT

Frequently asked questions

Do you have questions? Here you can find further information.

Where is Kyung based?

Kyung is based in Munich, Germany and can operate in on-site, hybrid, and remote work models.

What languages does Kyung speak?

Kyung speaks the following languages: Korean (Native), English (Advanced), German (Intermediate).

How many years of experience does Kyung have?

Kyung has at least 28 years of experience. During this time, Kyung has worked in at least 8 different roles and for 8 different companies. The average length of individual experience is 4 years and 6 months. Note that Kyung may not have shared all experience and actually has more experience.

What roles would Kyung be best suited for?

Based on recent experience, Kyung would be well-suited for roles such as: Expert, Design-to-Mask Preparation, Senior Customer Application Engineer (Calibre Portfolio), Consultant Sales Engineer (Asia Market).

What is Kyung's latest experience?

Kyung's most recent position is Expert, Design-to-Mask Preparation at Robert Bosch Semiconductor Manufacturing Dresden.

What companies has Kyung worked for in recent years?

In recent years, Kyung has worked for Robert Bosch Semiconductor Manufacturing Dresden, Siemens EDA (Electronic Design Automation and Mentor Graphics).

Which industries is Kyung most experienced in?

Kyung is most experienced in industries like Manufacturing, Information Technology (IT), and Automotive.

Which business areas is Kyung most experienced in?

Kyung is most experienced in business areas like Product Development, Quality Assurance (QA), and Project Management. Kyung also has some experience in Research and Development (R&D), Sales, and Operations.

Which industries has Kyung worked in recently?

Kyung has recently worked in industries like Manufacturing, Information Technology (IT), and Automotive.

Which business areas has Kyung worked in recently?

Kyung has recently worked in business areas like Product Development, Quality Assurance (QA), and Project Management.

What is Kyung's education?

Kyung holds a Bachelor in Electronics Engineering from University of Ulsan.

Does Kyung have any certificates?

Kyung has 1 certificate: EU Long-Term Residence Permit (Long-Term EU Residence Permit).

What is the availability of Kyung?

Kyung will be available full-time from February 2026.

What is the rate of Kyung?

Kyung's rate depends on the specific project requirements. Please use the Meet button on the profile to schedule a meeting and discuss the details.