Massimiliano G.
Founder and Managing Director, SoC Integration Engineer
Experience
Jun 2022 - Present
3 years 5 monthsMunich, Germany
Founder and Managing Director, SoC Integration Engineer
PlanV
- CVA6 MMU: formal verification using SVA
- CVA6 subsystem: IP integration, verification (UVM)
- Tightly coupled cache coherence for CVA6: RTL design and verification (SystemVerilog)
- FPGA prototyping (IP integration – CPU, LLC, DDR, Eth)
- Linux development
- Verification of a laser controller on FPGA (medical, VHDL, VUnit, Python, C++ for Microblaze)
- Fault injection emulation on FPGA (SystemVerilog)
Feb 2022 - Dec 2023
1 year 11 monthsCanada
Staff Member, DevOps Engineer
OpenHW Group
- CI using AWS CodeBuild and GitHub Actions
- Xilinx Vivado development
- Siemens Questa verification
- Promotional activities: demo application for CORE-V-MCU, OpenHW TV, trade fairs
Sep 2021 - Present
4 years 2 monthsFreelance Consultant - ASIC Design and Verification
QuantumBlockchainTechnologies
- Responsible for the development of ASIC for crypto mining
- Definition of the verification architecture
- RTL design and testing
- Synthesis with Cadence Genus
- FPGA SoC integration prototyping
- Interfacing with teams developing optimized algorithms
- Interfacing SDRAM, DDR2 with backend
- Interfacing with EDA tool vendors
Jun 2018 - Feb 2022
3 years 9 monthsGermany
Head of Hardware Development
HENSOLDT CYBER GmbH
- Responsible for development of the MiG-V chip family: system architecture definition, RTL design, IP integration (CPU, Eth, SDRAM, flash)
- Logic obfuscation
- Definition and execution of test strategy
- Workflow definition and automation
- FPGA prototyping using Yosys
- Interfacing with EDA tool vendors and backend engineers
- GCC interfacing with software team
- Collaboration with university partners
- Recruiting and mentoring new employees
- Reporting to CTO and Chief Scientist
Aug 2016 - Dec 2017
1 year 5 monthsGermany
Freelance Consultant
Infineon
- Development of virtual prototype of smartcard chips (SystemC)
Apr 2015 - Nov 2015
8 monthsUnited States
Freelance Consultant
PHLUIDO
- FFT hardware acceleration based on Zynq
- Development of related Linux driver (Xilinx Tcl and C)
Mar 2015 - Apr 2015
2 monthsItaly
Freelance Consultant
MAVIGEX
- Development of S-M2M modulator (C and VHDL)
Jun 2013 - Dec 2013
7 monthsItaly
Freelance Consultant
Mindway
- BCH and LDPC encoder development for DVB-T2 (VHDL code and C++ model)
- Turbo encoder development for an FSIM modulator (VHDL code and C++ model)
May 2011 - May 2018
7 years 1 monthGermany
Freelance Consultant
Intel Mobile Communications
- Development and verification of firmware and virtual prototype of a DMA
- Firmware development in Forth
- Low-level simulations with Synopsys VCS
- Virtual prototype design in SystemC
- Interfacing with hardware development team
- Participation in chip bring-up
Jun 2010 - Nov 2010
6 monthsItaly
Freelance Consultant
CNIT
- Quantization and modeling of a signal detection and synchronization algorithm for satellite communications (C)
Jan 2009 - May 2011
2 years 5 monthsItaly
FPGA Engineer
Mindway
- RTL development and FPGA implementation of ECC systems (ProMPEG-COP3, block product codes) for broadcasting systems
- VHDL and Xilinx Spartan3 development
Jan 2008 - Dec 2008
1 yearItaly
FPGA and Firmware Consultant
Info Solution
- Optimization and FPGA porting of protection management for an optical multi-service node
- Development of a heating measurement system UNI EN 834 compliant (C and assembly for Microchip PIC)
May 2007 - Nov 2007
7 monthsFrance
R&D Engineer
TurboConcept
- Design and verification of a low latency turbo encoder for WiMax (VHDL and Altera Stratix2)
Nov 2006 - Apr 2007
6 monthsFrance
Trainee
TurboConcept
- Development of VHDL to SystemC/Verilog translation and manipulation tool
Summary
I am an experienced engineer with a strong background in SoC integration, ASIC/FPGA design, and verification. My journey spans from developing complex systems with SystemVerilog and VHDL to driving CI processes and prototyping in FPGA environments.
I have led teams in high-stakes projects, mentored emerging talents, and collaborated with industry partners to deliver robust solutions in electronics and semiconductor design. I focus on clear, practical results by integrating hardware and software innovations to meet critical industry demands.
Languages
Italian
NativeGerman
AdvancedEnglish
AdvancedFrench
AdvancedRussian
ElementaryEducation
Sep 2003 - Apr 2006
University of Parma
Master of Science in Electronic Engineering · Electronic Engineering · Parma, Italy · 110/110 cum laude
Sep 2000 - Dec 2003
University of Parma
Bachelor of Science in Electronic Engineering · Electronic Engineering · Parma, Italy · 110/110 cum laude
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