Massimiliano Giacometti - Founder and Managing Director, SoC Integration Engineer

Recommended expert

Munich, Germany

Experience

Jun 2022 - Present

3 years 8 months

Munich, Germany

Founder and Managing Director, SoC Integration Engineer

PlanV

CVA6 MMU: formal verification using SVA
CVA6 subsystem: IP integration, verification (UVM)
Tightly coupled cache coherence for CVA6: RTL design and verification (SystemVerilog), FPGA prototyping (IP integration - CPU, LLC, DDR, Eth), Linux
Verification of a laser controller on FPGA (medical, VHDL, VUnit, Python, C++ for Microblaze)
Fault injection emulation on FPGA (SystemVerilog)

Feb 2022 - Dec 2023

1 year 11 months

Canada

Staff Member

OpenHW Group

DevOps engineer: CI using AWS CodeBuild, GitHub Actions
Promotional activities: demo application for CORE-V-MCU, OpenHW TV, trade fairs

Sep 2021 - Present

4 years 5 months

United Kingdom

Freelance Consultant - ASIC Design and Verification

QuantumBlockchainTechnologies

Responsible for the development of ASIC for crypto mining: definition of the verification architecture, RTL design and testing, synthesis with Cadence Genus, FPGA prototyping
Interfacing with the teams developing the optimized algorithms, interfacing SDRAM, DDR2 with backender, interfacing with the EDA tool vendors

Jun 2018 - Feb 2022

3 years 9 months

Germany

Head of Hardware Development

HENSOLDT Cyber GmbH

Definition of the system architecture for the MiG-V chip family, RTL design, IP integration (CPU, Ethernet, SDRAM, flash)
Logic obfuscation, definition and execution of the test strategy, definition and automation of the workflow
FPGA prototyping with Yosys, interfacing with EDA tool vendors and backender, GCC interfacing with the software team
Interfacing with university partners, recruiting, mentoring new employees (VHDL/Verilog/SystemVerilog), reporting to CTO and Chief Scientist

Apr 2015 - Nov 2015

8 months

Germany

Freelance Consultant

Infineon

Development of the virtual prototype of smartcard chips (SystemC)

Mar 2015 - Apr 2015

2 months

United States

Freelance Consultant

PHLUIDO

FFT hardware acceleration based on Zynq and related Linux driver (Xilinx Tcl and C)

Jun 2013 - Dec 2013

7 months

Italy

Freelance Consultant

Mavigex

Development of S-M2M modulator (C and VHDL)

May 2011 - May 2018

7 years 1 month

Freelance Consultant

Intel Mobile Communications

Development and verification of the firmware and virtual prototype of a DMA: firmware development in Forth, low level simulations with Synopsys VCS
Design of the virtual prototype in SystemC, interfacing with the hardware development team, participating in chip bringup

Jun 2010 - Nov 2010

6 months

Italy

Freelance Consultant

Mindway

BCH and LDPC encoder development for DVB-T2 (VHDL code and C++ model)
Turbo encoder development for an FSIM modulator (VHDL code and C++ model)

Jan 2009 - May 2011

2 years 5 months

Italy

Freelance Consultant

CNIT

Quantization and modeling in C of a signal detection and synchronization algorithm for satellite communications

Jan 2008 - Dec 2008

1 year

Italy

FPGA Engineer

Mindway

RTL development and FPGA implementation of ECC systems (ProMPEG-COP3, block product codes) for broadcasting systems (VHDL and Xilinx Spartan3)

May 2007 - Nov 2007

7 months

Italy

FPGA and Firmware Consultant

Info Solution

Optimization and FPGA porting of protection management for an optical multi-service node
Development of a heating measurement system UNI EN 834 compliant (C and assembly for Microchip PIC)

Nov 2006 - Apr 2007

6 months

France