Hussein K.
QA and Test Automation Engineer
Experience
QA and Test Automation Engineer
Intel
- Verified internal and external semiconductor technologies to support the release of design packages.
- Developed automated testing environments using Bash and Python to streamline verification workflows.
- Created and maintained TCL scripts to configure ivars and automate testbench execution.
- Performed comprehensive validation of technology libraries and Verilog files.
- Utilized a range of industry-standard EDA tools including Fusion Compiler, Innovus, ICV, Calibre (Mentor Graphics), Seascape (Ansys).
- Conducted root cause analysis to debug and resolve issues across various tool flows.
- Defined and tracked QoR (Quality of Results) metrics to provide a macro-level view of design package health.
- Optimized test runtime and resource usage to improve efficiency and turnaround time.
FPGA Development Engineer
Qualcomm
- Implemented a graphical user interface using C# to generate the bitstream of the project in batch mode, program the FPGA, and flash the memory with a remote access feature instead of hardware managing platform.
Graduate Research Assistant
American University of Beirut
Improved and built new AI design for early COVID-19 detection based on chest computed tomography image analysis.
Surveyed state-of-the-art methods to detect COVID-19 through image processing.
Collected data for the training and testing sets.
Augmented the data to enrich the input of the proposed architecture.
Implemented the algorithm using Python.
Published a journal paper in Frontiers community: AI-Based Image Processing for COVID-19 Detection in Chest CT Scan Images.
Proposed a platform that covers several levels of analysis and classification of normal and abnormal aspects of COVID-19 by examining CT chest scan images.
Obtained results show that the accuracy of the proposed architecture is 95%.
FPGA Development Engineer
ARECS
- Implemented LIN Core Master/Slave on FPGA using VHDL as a part of Controller Area Network (CAN) router with AXI bus as host interconnect (project delivered to Volkswagen).
- Designed hardware of a controller for interferometer and implemented it on FPGA using VHDL with Avalon bus as host interconnect (project delivered to ZEISS).
- Designed hardware and software of the physical and MAC layers of a wireless modem based on a customized protocol implemented on Red Pitaya board: physical layer on FPGA using VHDL and MAC layer on ARM processor using C code with AXI bus as host interconnect.
- Simulated the whole architecture in MATLAB to achieve a benchmark.
- Conducted simulation, self and automated testing over the whole project.
- Documented the projects and testing including register mapping, constraints, and overview.
Working Student
ARECS
- Implemented a transmitter from A to Z using VHDL and simulation using MATLAB (remote working student).
Undergraduate Research Assistant
American University of Beirut
- Surveyed Cross-Polarization Interference Cancellation (XPIC) methods and created a MATLAB simulator.
- Surveyed different methods proposed to solve the interference.
- Implemented a MATLAB simulator to accommodate the methods.
- Validated the results of papers and concluded the best one to use depending on the application.
Languages
Education
American University of Beirut
Master of Engineering · Communications and Hardware Engineering · Beirut, Lebanon · 1.0
American University of Beirut
Bachelor of Engineering · Computer and Communications Engineering · Beirut, Lebanon · 1.17
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