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Yaroslav Gubin

Senior Analog IC Design Engineer

Yaroslav Gubin
Tremelo, Belgium

Experience

Apr 2021 - Present
4 years 11 months
Belgium

Senior Analog IC Design Engineer

IMEC

Responsible for analog/mixed-signal IPs development for space applications ranging from schematics development through spice simulation, layout design guidance to post layout netlist extraction and simulation implementing radiation hardened by design techniques.

Designed Rad Hardened by Design LVDS and NVM IPs for space applications in 180nm technology. IPs ready for integration.

Designed several high- and core-voltage IPs for medical applications like brain stimulation.

Feb 2018 - Oct 2022
4 years 9 months

Senior Custom IC Design Engineer

Responsible for analog/mixed-signal IPs development for various ASICs including schematics development, spice pre- and post-layout simulations, layout design guidance. Responsible for technical guidance of other design engineers. Worked remotely with multinational teams.

Worked with Bitfury company on Bitcoin core custom design in near threshold power supply region with lowest power consumption. Developed several analog blocks for mining chip and support controller chip using 10nm and 5nm FinFET and 22nm FDSOI technologies.

Designed 12bit 30MS/s SAR ADC in 65nm CMOS, ready for test chip integration. Later ported to 130nm CMOS with 1MS/s sampling rate.

Apr 2010 - Jan 2018
7 years 10 months
Russian Federation

Analog/Mixed-Signal IC Team Lead

Digital Solutions

Led analog/mixed-signal IPs development for various ASICs and SoCs from system architecture and technical specifications through schematics development, spice pre- and post-layout simulation to layout design guidance. Guided lab evaluation and issue investigation. Responsible for project technical lead and small design team management.

Key projects:

  • Rad Hardened by Design direct digital synthesizer (DDS) for aerospace radio in 0.18um CMOS - designed 12-bit 300MSPS current steering DAC and led ADPLL and current reference with BGAP design
  • USB 2.0 transceiver IP (PHY) in 0.18um LP CMOS - led development of all analog blocks
  • Rad Hardened by Design SerDes PHY IPs (1.25Gbps and 3.125Gbps) in 0.18um and 90nm - performed system architecture design, supervised block development, designed phase interpolator and CDR samplers
  • Low power ASIC in 0.18um CMOS with comparators, LDOs, 8-bit SAR ADC, references, oscillator and control circuit
  • Heavy Ions Detector for aerospace with modified SRAM cells in 0.18um CMOS
  • HV ASIC with LVDS interface in 0.25um BCD CMOS including LVDS receiver, HV power switches, protection circuits, BGAP, LDO
  • Designed RHBD standard cell and IO libraries for aerospace projects
  • Designed 60-80MHz and 2-10MHz RC-oscillators in 0.18um and 65nm CMOS
Sep 2008 - Apr 2010
1 year 8 months

Foundry Relations Manager

SensorIS

Managed IC Layout Design Group (4 engineers), handled interaction with Silicon Fabs on technical/technological issues and IP providers, prepared tapeout project data for MPW and engineering lots.

Successfully taped out 7 MPWs, 2 MLMs and 2 mass-produced ICs. Led layout designs of 6 ICs. Performed critical DRC and LVS verifications.

Mar 2004 - Aug 2008
4 years 6 months
Russian Federation

Senior IC Design Engineer

Unique ICs

Responsible for circuit design, pre/post-layout simulations, layout design guidance, complex IC evaluation, and small digital circuits design.

Designed analog circuits for USB2.0 PHY, DVI PHY including AD-PLLs up to 1500MHz, USB1.1 cable repeater (UIC4102CP). Designed and characterized basic digital library in 0.18um CMOS and ECL digital library in 0.13um SiGe BiCMOS.

Sep 2001 - Mar 2004
2 years 7 months
Russian Federation

IC Designer Intern

Unique ICs

Designed analog blocks (output drivers, receivers) for FireWire (IEEE1394) transceiver. Developed 1.5GHz integrated LNA for GLONASS application in GaAs technology including integrated inductors design.

Investigated frequency characteristics and q-factor dependence of integrated inductors using electromagnetic solver. Designed inductor for 1.5GHz LC VCO.

Industries Experience

See where this freelancer has spent most of their professional time. Longer bars indicate deeper hands-on experience, while shorter ones reflect targeted or project-based work.

Experienced in Manufacturing (21 years), Aerospace and Defense (10.5 years), Healthcare (5 years), Space Exploration (5 years), and Information Technology (4.5 years).

Manufacturing
Aerospace and Defense
Healthcare
Space Exploration
Information Technology

Business Areas Experience

The graph below provides a cumulative view of the freelancer's experience across multiple business areas, calculated from completed and active engagements. It highlights the areas where the freelancer has most frequently contributed to planning, execution, and delivery of business outcomes.

Experienced in Product Development (24.5 years), Research and Development (15 years), and Project Management (8 years).

Product Development
Research and Development
Project Management

Languages

Russian
Native
English
Advanced
Dutch
Elementary

Education

Oct 2002 - Jun 2004

Moscow Institute of Physics and Technology (MIPT)

M. Sc. · Physical and Quantum Electronics (DPQE), Applied Physics and Mathematics · Russian Federation

Oct 1998 - Jun 2002

Moscow Institute of Physics and Technology (MIPT)

B. Sc. · Physical and Quantum Electronics (DPQE), Applied Physics and Mathematics · Russian Federation

Profile

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Frequently asked questions

Do you have questions? Here you can find further information.

Where is Yaroslav based?

Yaroslav is based in Tremelo, Belgium.

What languages does Yaroslav speak?

Yaroslav speaks the following languages: Russian (Native), English (Advanced), Dutch (Elementary).

How many years of experience does Yaroslav have?

Yaroslav has at least 24 years of experience. During this time, Yaroslav has worked in at least 6 different roles and for 4 different companies. The average length of individual experience is 4 years and 1 month. Note that Yaroslav may not have shared all experience and actually has more experience.

What roles would Yaroslav be best suited for?

Based on recent experience, Yaroslav would be well-suited for roles such as: Senior Analog IC Design Engineer, Senior Custom IC Design Engineer, Analog/Mixed-Signal IC Team Lead.

What is Yaroslav's latest experience?

Yaroslav's most recent position is Senior Analog IC Design Engineer at IMEC.

What companies has Yaroslav worked for in recent years?

In recent years, Yaroslav has worked for IMEC.

Which industries is Yaroslav most experienced in?

Yaroslav is most experienced in industries like Manufacturing, Aerospace and Defense, and Healthcare. Yaroslav also has some experience in Space Exploration and Travel and Information Technology (IT).

Which business areas is Yaroslav most experienced in?

Yaroslav is most experienced in business areas like Product Development, Research and Development (R&D), and Project Management.

Which industries has Yaroslav worked in recently?

Yaroslav has recently worked in industries like Healthcare, Space Exploration and Travel, and Information Technology (IT).

Which business areas has Yaroslav worked in recently?

Yaroslav has recently worked in business areas like Product Development and Research and Development (R&D).

What is Yaroslav's education?

Yaroslav holds a Master in Physical and Quantum Electronics (DPQE), Applied Physics and Mathematics from Moscow Institute of Physics and Technology (MIPT) and a Bachelor in Physical and Quantum Electronics (DPQE), Applied Physics and Mathematics from Moscow Institute of Physics and Technology (MIPT).

What is the availability of Yaroslav?

Yaroslav is immediately available for suitable projects.

What is the rate of Yaroslav?

Yaroslav's rate depends on the specific project requirements. Please use the Meet button on the profile to schedule a meeting and discuss the details.

How to hire Yaroslav?

To hire Yaroslav, click the Meet button on the profile to request a meeting and discuss your project needs.

Average rates for similar positions

Rates are based on recent contracts and do not include FRATCH margin.

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Market avg: 740-900 €
The rates shown represent the typical market range for freelancers in this position based on recent contracts on our platform.
Actual rates may vary depending on seniority level, experience, skill specialization, project complexity, and engagement length.