Pooria V.

Chief Technology Architect

Maynooth, Ireland

Experience

Feb 2025 - Present
9 months

Chief Technology Architect

Benetel

  • Drive Technology Strategy
  • Lead System Architecture
  • Lead Research Funding Initiatives
Oct 2021 - Feb 2025
3 years 5 months

Research and Development Principal Engineer

Benetel

  • Architecting overall system solutions to demonstrate system level functionality of roadmap features
  • Leading research activities in support of Benetel’s product roadmap
  • Leading the incorporation of roadmap features in active product development programs
  • Leading Benetel IP capture and management
Aug 2021 - Oct 2021
3 months

Senior System Engineer

Qorvo

  • Researching UWB communications systems algorithms
  • Developing system simulations and baseband architectures
Sep 2020 - Aug 2021
1 year

Principal Engineer

Benetel

  • Designing and developing DSP modules such as DUC/DDC, PRACH in 5G RRUs
  • Developing ModelSim testbenches and verifying them using Matlab/Octave simulation
  • Leading the 5G architecture development of ORAN compliant RRU
  • Leading the FPGA team in designing and developing the lower L1 of 5G
  • Actively participating in the design and development of CUSM-Planes
  • Creating firmware development plans and reporting progress to project managers
  • Providing test vectors for conducting RRU verification based on 3GPP standard
Jan 2018 - Sep 2020
2 years 9 months

Senior FPGA Engineer

Benetel

  • Designing and developing 4G and 5G NR ORAN-compliant RRUs
  • Developing FPGA code in SystemVerilog/Verilog
  • Designing digital up-conversion and down-conversion modules on FPGA
  • Developing self-checking testbenches for downlink and uplink paths
  • Designing and developing the PRACH module in the RRU
  • Leading the first RRU project with split 7.2 using an ARM processor, showcased in exhibitions like MWC and receiving awards
  • Developing a U-Plane path from ARM to FPGA using DMA and FIFO
  • Actively participating in ORAN meetings and gaining extensive knowledge on fronthaul and CUSM planes
  • Providing consultation on various 5G technology projects to multiple companies
  • Conducting several internal presentations to Benetel staff on topics such as digital predistortion, crest factor reduction, and OFDM systems
  • Project planning and documentation
Sep 2017 - Dec 2017
4 months

Radio Digital Developer

Ericsson

  • Performing calibration of a 1 GHz bandwidth signal for the 5G testbench, encompassing RF DAC, RF ADC, and wideband PA
  • Designing and verifying a novel DPD technique to linearize the wideband PA
  • Offering consultation to the CFR team at Ericsson
Aug 2015 - Sep 2017
2 years 2 months

Research Fellow

National University of Ireland Maynooth

  • Developing algorithms for digital communication systems
  • Providing consultation to two US companies for their product development in DPD and satellite projects
  • Implementing a digital pre-distortion technique on Zynq with an ARM processor in FPGA
  • Demonstrating the pre-distortion functionality running on FPGA using a transceiver board from Analog Devices
  • Conducting RTL development and synthesis
  • Analyzing the Static Timing Analysis (STA) report and rectifying critical paths in the design by applying pipeline delays
  • Performing hardware co-simulation verification by transferring data from a PC while the FPGA and power amplifier were in the loop
  • Creating code to linearize a TWTA power amplifier
Jan 2013 - Jun 2015
2 years 6 months

Senior Lecturer

University Putra Malaysia

  • Supervising undergraduate, MSc, and PhD students
  • Providing consultation for research projects and theses
  • Teaching communication systems modules
  • Actively involved in commercializing filed IPs and developing an IP in Verilog
  • Publishing high-impact journal papers
Jun 2012 - Jan 2013
8 months

Senior Lecturer

Asia Pacific University of Technology & Innovation

  • Taught telecommunication modules
  • Established the wireless lab and participated in the accreditation program
Jun 2010 - Jun 2012
2 years 1 month

Researcher

University Putra Malaysia

  • Submitted research proposals
  • Involved in commercialization of IPs
Jan 2007 - Jan 2008
1 year 1 month

Electrical Engineer

AGNI Inc.

  • Headed the electronic group
  • Designed DC-DC and DC-AC converters
  • Developed C code to control a butterfly valve using an Atmel microcontroller
  • Designed an H-bridge
  • Created schematics and fabricated PCBs
Mar 2003 - Mar 2004
1 year 1 month

Digital Communication Engineer

Resana Afzar Sharif

  • Designed and developed a digital pre-distortion for 2.4 GHz power amplifier
  • Involved in test and measurement of a TV transmitter with PLL
Jun 2000 - Jun 2002
2 years 1 month

Electronic Engineer

Micromodje Industry

  • Designed and developed a radio digital and prepared BOM
  • Fabricated PCBs, and drew schematics

Summary

I specialize in digital signal processing and FPGA programming for wireless communication systems, with extensive experience in designing and developing remote radio units (RRUs).

I am highly proficient in Verilog, SystemVerilog, and C, and skilled in using industry-standard tools such as Quartus, Vivado, Vivado HLS, MATLAB, Python, Protel, and Microwave Office.

I have led the design and architecture of 4G and 5G ORAN-compliant RRUs and have contributed to the field through several peer-reviewed publications and patent filings.

Languages

English
Advanced

Education

Oct 2006 - Jun 2010

University Putra Malaysia

Ph.D · Malaysia

Oct 2003 - Jun 2005

Tarbiat Modares University

MSc · Iran, Islamic Republic of

Oct 1998 - Jun 2003

Khajeh Nasir Toosi

B. Eng · Iran, Islamic Republic of

Certifications & licenses

ARM Accredited Engineer (AAE)

ARM

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