Gokhan I.

System Architect Consultant

United States

Experience

Jul 2022 - Present
3 years 5 months

System Architect Consultant

Defense industry

  • Implemented and integrated an artificial neural network (ANN) pre-filter into a large-scale (~1.5M LOC) real-time terrain simulator, reducing CPU utilization by ~20% at 60 fps and enabling denser scenario modeling.
  • Built a scalable ETL and analytics reporting pipeline in R that converts user filters into SQL queries, processes telemetry data, generates statistical charts and HTML reports, accelerating yield analysis across large datasets of ~400k entries.
  • Modeled Laser Warning Receiver (LWR) in MATLAB & Simulink for desert warfare by integrating optics, RF power amplifier, photodiode, and atmospheric effects, extending detection range by ~0.5 km at a fixed false-alarm rate (FAR).
May 2017 - May 2022
5 years 1 month
Santa Clara, United States

Member of Technical Staff, System Architect

AMD

  • Developed a comprehensive (~3k LOC) time-domain GDDR6 link simulator (RxSim) in MATLAB from the ground up by modeling equalization (CTLE/DFE), clock/data recovery (CDR) loop, DACs, calibrations, noise, and nonlinearity.
  • Optimized GDDR6 CTLE parameters and DFE taps, verified Rx RTL calibrations, and demystified bang-bang CDR tracking behavior using RxSim in collaboration with analog, digital, and SI teams, accelerating design and verification cycles.
  • Led GDDR6 top-level simulation flow in ADE-XL, automated post-processing with OCEAN, delivered executive-level BER performance reports under tight compute constraints, shaping the DRAM roadmap tied to ~25% of AMD revenue.
  • Led GDDR7 PHY early architecture evaluations and link budgeting using Cadence and Seasim, uncovering system bottlenecks and EQ trade-offs; improved eye margin by ~30% and accelerated the PAM4 transition.
  • Drove PCIe 6.0 receiver front-end architecture definitions using Seasim and Cadence, streamlined post-processing with Python, optimizing PAM4 CTLE topology and reducing ADC precision requirements by ~10% (≈0.5 ENOB).
  • Modeled Decision Feedback Equalizer (DFE) error propagation in Simulink and quantified burst-error rates under jitter and ISI stress, validating link reliability targets and avoiding additional Forward Error Correction (FEC) overhead.
  • Led Virtuoso ADE-to-MATLAB integration evaluations as AMD’s appointed representative to MathWorks.
Feb 2012 - Apr 2017
5 years 3 months
Santa Clara, United States

System Architect

Oracle

  • Resolved a critical silicon failure caused by Spread Spectrum Clocking (SSC) by modeling a 2nd-order CDR with offset tracking; theorized the tracking mechanism and identified the root cause, enabling a silicon fix later granted a U.S. patent.
  • Co-developed serial-link simulator (SlSim); implemented batch-mode operation and version control integration; analyzed CDR latency and tracking mechanisms; performed link budgeting and tuning, improving link performance and stability.
  • Developed and integrated SmartSearch Jitter-Tolerance (JTOL) algorithm into SlSim, eliminating vector and step-size initialization overhead and reducing average runtime by over 60%; mentored 5 engineers on JTOL workflow adoption.
  • Designed a novel Retimer with built-in eye-monitoring; automated timing closure with OCEAN (~2k LOC) to ensure robust clock/data interface timing margins, completed full tape-out verifications, achieving first-pass silicon success.
  • Optimized Phase-Locked Loop (PLL) blocks including the phase detector, charge pump, and clock receiver; supervised the layout, executed EM/IR analyses, owned top-level lock simulations and spec documents, delivering two PLL tape-outs.
  • Designed DLL sub-blocks including Thermal Decoder, Fine Delay, and Clock Decoder, delivering 2200 MHz DDR4 tape-out.

Summary

Systems engineer with 10+ years of experience building high-fidelity system simulators and data pipelines in Python, MATLAB, and R.

Applies statistical modeling, signal processing, and machine learning to build robust, scalable systems.

Languages

English
Native
Turkish
Elementary

Education

Bilkent University

B.S. in Electrical & Electronics Engineering · Electrical & Electronics Engineering · Ankara, Turkey

Texas A&M University

M.S. in Electrical & Computer Engineering · Electrical & Computer Engineering · College Station, United States

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